The disclosure relates to voltage domain converters, and in particular, to fast voltage domain converters with symmetric and supply insensitive propagation delay.
Unless otherwise indicated herein, the approaches described in this section are not admitted to be prior art by inclusion in this section.
A switching driver having a cascode power stage can be used to control a switching regulator. In the cascode power stage, a single-ended input signal from one voltage domain such as voltages DVDD/DVSS is split into high-side and low-side paths to drive high side (HS) and low side (LS) power field effect transistors (FETS), respectively, of the switching driver. The HS power FETS operate in a second voltage domain such as voltages VDD/VMHS (mid-voltage high side), while the LS power FETS operate in a third voltage domain such as voltages VMLS (mid-voltage high side)/GND. Even when the difference between the voltages VDD and VMHS equals the difference between the voltages VMLS and GND, each individual voltage is different. The second voltage domain and the third voltage domain are disturbed independently and differently all the time due to switching activities. Conventional level shifters consume large amounts of power and generate unbalanced and unsymmetrical propagation delay, thereby reducing the efficiency of the switching regulator.